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Description: VHDL16位cpu,能实现加减法移动等指令-vhdl 16 cpu,include add,sub,move and so on.
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Size: 19456 |
Author: 王军 |
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Description: 16位简单cpu用VHDL语言实现。里面有好几个的》-16-bit cpu with a simple VHDL language. There are several of the "
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Size: 3181568 |
Author: pjj |
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Description: Cpu 8bit. Vorks good. Taking all instructions, sdo OR Xor and athor...
Is registers
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Size: 8192 |
Author: kaktusasturbo |
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Description: 一个简单的CPU设计,支持add,sub,mvi,mv四条指令,用Verilog语言编写,在Quratus II上编译通过,仿真正确。-A simple CPU design, support add, sub, mvi, mv four instructions, with the Verilog language, compiled by the Quratus II, the simulation is correct.
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Size: 931840 |
Author: 姜涛 |
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Description: 5 stage pipeline CPU, verilog HDL code-5 stage pipeline CPU
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Size: 2048 |
Author: dylan |
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Description: 使用vhdl 开发语言编写的 微处理器 内容比较详尽 -Developed using the language of the microprocessor vhdl
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Size: 148480 |
Author: 王俊 |
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Description: VHDL processsor 32 bit
ALU
SRF
BUS DATA
ADRESS
C16 System On Chip Architecture
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Size: 976896 |
Author: luis |
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Description: 单周期的mips处理器设计,用vhdl语言实现各个模块的功能-Single-cycle mips processor design, using vhdl language functions of each module
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Size: 117760 |
Author: 王晓强 |
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Description: 这是一个用VHDL语言写的简单带存储器的CPU设计,不涉及流水线设计,只是简单的利用QUARTUES II里的ram-This is a simple memory write VHDL CPU design, does not involve the assembly line design, simply use the ram in QUARTUES II
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Size: 1262592 |
Author: 郭雅娟 |
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Description: vhdl实现cpu,在实验台上模拟访存,实现简单的四则运算以及跳转-a cpu by vhdl and used on table
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Size: 2233344 |
Author: 土豆 |
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Description: 实现一个简单的8位cpu,具有基本的运算指令和控制指令,可扩展-Implement a simple 8-bit cpu, have a basic command and control operations instruction, scalable
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Size: 837632 |
Author: 李志灿 |
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Description: 根据计算机组成原理课程所学的知识和本课程所讲的设计思想,设计一个给定指令系统的处理器,包括:VHDL语言的实现;FPFA芯片的编程实现;
-Based on the knowledge and the curriculum computer architecture course learn about design thinking, design a given the instruction system' s processor, including: the realization of VHDL language FPFA chip programming
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Size: 18432 |
Author: heyuhong |
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Description: vhdl cpu芯片逻辑设计的一部分实现 只有一小部分 大家可以看一下 寄存器 加法器之类的-vhdl cpu chip logic design part of its implementation only a little part everry look and see b=about registers adder and so on
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Size: 52224 |
Author: 刘志富 |
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Description: 用vhdl实现了具有流水的cpu,实现30条基于mips指令的指令集-Achieved with vhdl cpu with water, to achieve 30 mips instruction based instruction set
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Size: 816128 |
Author: 梁立建 |
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Description: 使用vhdl实现一个简易的cpu包含and or xor add sub mul 指令-Achieved using a simple vhdl cpu contain and or xor add sub mul instruction
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Size: 7573504 |
Author: 张炜炜 |
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Description: CPU VHDL based design
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Size: 46080 |
Author: DoubleP
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Description: 根据vhdl设计的32位CPU具备加减 读写等标准功能(a 32-bit cpu based on VHDL designed with function of fundamental function of subtraction , addition, load and store .)
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Size: 19456 |
Author: kankanla1
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Description: 简单的CPU设计,使用VHDL 和 quartus ii 设计的cpu(a simply cpu design, vhdl quartus ii ,dsg gs h srh rsh rsh srjh srh)
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Size: 1488896 |
Author: fgsdgsdg
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Description: 16位MIPS指令集,VHDL实现,非常简单,非常粗暴(library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;)
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Size: 817152 |
Author: nodgd
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Description: 针对硬件开发,采用VHDL编写 哈工大计算机设计与实践(Hardware development)
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Size: 15837184 |
Author: hc_jc
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